A. Zitouni, N. Jarray, M. Elhaji, "Case Study of Vision Systems: Optimized Compression Architecture for Wireless Endorobot ", Book Chapter (Chapter 12), Endorobotics, Design R&D and Future Trends, ISBN: 978-0-12-821750-4.00012-8, 2022, pp. 275–293. 1 A.Zitouni,B.Chemli,"AsynchronousDynamicArbiterforNetworkonChip",International Journal of Computer Applications in Technology, Vol. 67, no. 4, 2021, pp. 370–382. 2 R. Dalbouchi, S. Dhahri, M. Elhaji, A. Zitouni, "New Hardware Static and Reconfigurable Architectures for Video Watermarking System",International Journal of Circuits, Systems, and Computers, 2020, Vol. 29, No. 8, (31 pages). 3 S. Dhahri, A. Zitouni, "Low power adaptive Motion Estimator for real time applications H.264/AVC Codec",International Journal of Materials and Electronic Devices, Vol. 1, 2019, pp. 7-11.4 N. Jarray, M. Elhaji and A. Zitouni, "Eifficient Hardware Architecture of DCT Cordic based Loeffler Compression Algorithm for Wireless Endoscopic Capsule", De Gruyter Oldenbourg, ASSD – Advances in Systems, Signals and Devices, Vol. 8, 2018, pp. 23–36. 5 قائمة المنشورات البحثيةBouraoui Chemli, and Abdelkrim Zitouni. "Low Cost Network on Chip Router Design for Torus Topology." International Journal of Computer Science and Network Security, VOL.17 No.5, 2017. 6 Bouraoui Chemli, Abdelkrim Zitouni, Alexandre Coelho and Raoul Velazco. "Design of efficient pipelined router architecture for 3D Network on Chip." International Journal of Advanced Computer Science and Applications, Vol.8 No.7, 2017. 7 Asma, ben Hamida., Salah Dhari & Abdelkrim Zitouni, (2017). Real-Time H. 264/AVC Entropy Encoder Hardware Architecture in Baseline Profile. INTERNATIONAL JOURNAL OF ADVANCED COMPUTER SCIENCE AND APPLICATIONS, 8(3), 281-289. 8 Asma ben Hamida., Nedra Jarray & Abdelkrim Zitouni, (2017). Low-Power Hardware Design of Binary Arithmetic Encoder in H. 264. INTERNATIONAL JOURNAL OF ADVANCED COMPUTER SCIENCE AND APPLICATIONS, 8(7), 412-416 9 Nedra Jarray, Asma ben Hamida, Elhajji, M., & Zitouni, A. (2017). High quality and Efficient Image Compression used for Wireless Capsule Endoscopy. IJCSNS, 17(7), 106. 10N. Jarray, M. Elhaji and A. Zitouni, " An optimized DCT compressor based on Cordic-Loeffler approach for Wireless Endoscopic Capsule.", published by JAAS, The International Journal of Advanced and Applied Sciences, 2017, pp:1-8. 11A. Zitouni, A. Almimouni, M. Elhajji, "Low power design of wireless endoscopy compression communication architecture", International Journal: Electrical Systems and Information Technology, Elsevier, Vol. 4, No. 1, 2017. 12N. Abid and A. Zitouni, "TLM Platform Based on SystemC for Hybrid MSR Topology", International journal of science and Issue (IJCSI), Vol. 13, No. 5, 2016. 13N. Abid, B.ATTIA, and A. Zitouni, "HMSR: A Hybrid Network-on-Chip Topology Synthesis Based on Star-Ring-Mesh at System Level", International Journal of Computer Science and Information Security (IJCSIS), Vol. 14 No. 8, 2016. 14B. Chemli and A. Zitouni, "A Turn Model Based Router Design for 3D Network on Chip", World Applied Sciences Journal, Vol. 32, N. 8, pp. 1499-1505, 2014. 15
M. Elhaji, A. Zitouni, S. Meftali, J.L. Dekeyser and R. Tourki, «A low power oriented architecture for H.264 variable block size motion estimation based on resource sharing scheme», Integration, the VLSI Journal, Elsevier, 2012. 16B. Attia, A. Zitouni, W. Chouchenn, K. Torki and R.Tourki, «A modular nework interface design and synthesis outlook», International Journal of Computer Science (IJCSI), Vol. 9, No 2, pp. 470-482, 2012. 17B. Attia, A. Zitouni and Rached Tourki, «A new approach for network interface sharing with area and power optimizations», International Journal of Programmable Devices Circuit and Systems (PDCS), Vol. 12, No. 1, 2012. 18S. Dhahri, A. Zitouni and K. Torki, «A stoppable clock based four step search block-matching motion estimation architecture», Journal of Computer Technology and Application (CTA), Vol. 2, No.7, pp. 570-574, 2011. 19B. Attia, A. Zitouni, K. Torki and R.Tourki, «A low latency and power ASIC design of modular network interfaces for network on chip», International Journal of Computer Sciences and Engineering Systems (IJCSES), Vol.5, No.4, 2011. 20M. Elhaji, A. Zitouni, R. Tourki, «A low power ASIC design of a FSBM motion estimator for H.264AVC», International Journal of Programmable Devices Circuit and Systems (PDCS), Vol. 9, No. 1, pp. 53-58, 2009. 21B. Attia, W. Chouchenn, A. Zitouni and R.Tourki, «A Stoppable clock based Approach for low power network interface design in a network on chip», International Journal of Computer Science (IJCSI), Vol. 10, No 2, pp. 70-79, 2013. 22M. Elhaji, P. Boulet, A. Zitouni, S. Meftali, J.L. Dekeyser and R. Tourki, «System level modeling methodology of NoC design from UML-MARTE to VHDL», International Journal of Design Automation for Embedded Systems, Springer, 2012. 23S. Dhahri, L. Kabbai, A. Zitouni, K. Torki and Rached, «A low power VLSI ASIC design of a GS motion estimator», International Journal of Computer Sciences and Engineering Systems (IJCSES), Vol. 6, No. 2, 2012. 24A. Zitouni, M. Abid, K. Torki, R. Tourki, «Communication synthesis techniques for multiprocessor systems», International Journal of Electronics, Vol. 89, No. 1, pp. 55-76, 2002. 25A. Zitouni, S. Badrouchi, R. Tourki, «Communication architecture synthesis for multi-bus SoC», Journal of Computer Science, 2(1), pp. 63-71, 2006. 26A. Zitouni, M. Zid, M. Kerkeni, S. Badrouchi, and R. Tourki, «A new generic GALS router with multiple QoS for NoC», International Journal of Soft Computing, 2(1), pp. 249-256, 2007. 27A. Zitouni, M. Zid, S. Badrouchi, and R. Tourki, «A generic and extensible spidergon NoC», International Journal of Electronics, Circuits and Systems, Vol. 1, No. 3, pp. 197-202, 2007. 28A. Zitouni, R. Tourki, «Arbiter synthesis approach for SoC multiprocessor systems», Computers and Electrical Engineering Journal (C&EE), Vol. 34, pp. 63-77, 2008. 29A. Zitouni, R. Tourki, «Race-free state assignment technique for asynchronous circuits», International Journal of Electrical and Power Engineering 2(3), pp. 134-146, 2008. 30M. Zid, A. Zitouni, A. Beganne, R. Tourki, «Nouvelles architectures génériques de NoC», Journal International, Techniques et Sciences Informatiques (TSI), Vol. 28, No. 1, pp. 101-133, 2009. 31
S. Dhahri, A. Zitouni, H. Chaouch, R. Tourki «Adaptive motion estimator based on variable block size scheme», International Journal of Computers, Systems and Signals, (IJCSS), Vol. 9, No. 9, 2009. 32M. Hajji, A. Zitouni, S. Dhahri, R. Tourki, «A stoppable clock based full search motion estimator design», International Journal of Computer Sciences and Engineering Systems (IJCSES), Vol. 2, No. 4, pp. 275-280, 2008. 33S. Badrouchi, A. Zitouni, K. Torki, R. Tourki, «Asynchronous NoC router design», Journal of Computer Science 1(3), pp. 429-436, 2005. 34A. Zitouni, C. Souani, M. Abid, K. Torki, R. Tourki, «Approche de synthèse de communication pour les systèmes distribués», Journal, TECHNIQUE ET SCIENCE INFORMATIQUES (TSI), Vol. 19, No. 4, pp. 515-547, 2000
. 35A. Zitouni, M. Abid, R. Tourki, «Design of an asynchronous VME bus controller for heterogenous systems», Journal, DEDICATED SYSTEMS, 3rd quarter (Q3: 1375-6753), 2000. 36كتبISBN:978-9973-37-403-5 كتاب منشور من طرف المركز القومي للنشر البيداغوجي بتونس –2007Communication controllers for embedded systems 1كتاب منشور /Information theory and coding-Generis PublishingHouse-ISBN: 9789975153591-20202
مؤتمرات
Ben Hamida, S. Dhahri and A. Zitouni, "A low-cost Exp_Golomb hardware architecture for H.264/AVC entropy coder", 30th International Conference on Microelectronics (ICM2018), December, Tunisia, IEEE 2018. 1N. Jarray, M. Elhaji and A. Zitouni, "Efficient Hybrid DWT-DCT Architecture For Wireless Capsule Endoscopy", 15th International Multi-Conference on Systems, Signals & Devices (SSD), Tunisia, IEEE 2018. 2R. Dalbouchi, M. Elhaji, A. Zitouni, "A design platform for reconfigurable architecture and its application to watermarking system", 15th International Multi-Conference on Systems, Signals & Devices (SSD), Tunisia, IEEE 2018. 3I. Derbali, S. Dhahri, R. Dalbouchi, and A. Zitouni, "Software implementation of a hybrid method for copyright protection and video authentication 19th", Annual International Symposium on Stabilization, Safety, and Security of Distributed Systems, Hammamet, Tunisia, 2018. 4B. Chemli and A. Zitouni, “Architecture and Performances comparison of Network on Chip router for Hierarchical Mesh Topology”, The International Conference on Engineering & MIS (ICEMIS) 2017, Tunisia, IEEE 2017. 5R. Dalbouchi, S. Dhahri, M. Elhaji, A. Zitouni, "Software/Hardware implementations of a video watermarking scheme based on motion vectors", The International Conference on Engineering & MIS (ICEMIS) 2017, Tunisia, IEEE 2017. 6B. Chemli and A. Zitouni, “Design and Evaluation of Optimized router pipeline stages for Network on Chip” accepted in the IEEE 16th International Image Processing Applications and Systems Conference, November 2016, in Tunisia. 7
B. Chemli and A. Zitouni, "Design of a Networkon Chip router based on turn model", 16th international conference on Sciences and Techniques of Automatic control & computer engineering – STA'2015, pp. 85-88, December 2015, in Tunisia. 8A. Ben Hmida, S. Dhahri, A. Zitouni, "A Hardware Architecture Binarizer Design for the H.264/ AVC CABAC Entropy Coding", International Conference in Sciences and Electrical Technologies in Magreb (CISTEM2014), November 2014, in Tunisia. 9N. Jarray, M. Elhaji and A. Zitouni, "Low complexity and efficient architecture of 1D-DCT based Cordic-Loeffler for Wireless Endoscopy Capsule", 12th International Multi-Conference on Systems, Signals & Devices, Mars 2015, in Tunisia. 10S. Dhahri and A. Zitouni, «Implementation of a fast and low power 3SS algorithm for H.264 video coding», IEEE Int. Conf. on Control Decision and Information Technologies (CODIT’13), Hammamet, Tunisia, 2013. 11M. Elhaji, A. Zitouni, P. Boulet, R. Tourki, J.L. Dekeyser and S. Meftaly, «Modeling networks-on-chip at system level with the MARTE UML profile», IEEE Int. Conf. on Design Automation and Test in Europe (DATE'2011), Grenoble, France, 2011. 12S. Dhahri, A. Zitouni and R. Tourki, «A parallel processing architecture for FSS block-matching motion estimation», IEEE Int. Conf. on Communications, Computing and Control Applications (CCCA'11), Hammamet, Tunisia, 2011. 13M. Elhaji, A. Zitouni, S. Meftali, J.L. Dekeyser and R. Tourki, «A low power and highly parallel implementation of the H.264 8x8 transform and quantization», IEEE Int. Conf. on Signal Processing and Information Technology (ISSPIT'10), pp. 528-531, Luxor, Egypte, 2010. 14B. Attia, A. Zitouni and R. Tourki, «Design and implementation of network interface compatible OCP for packet based NoC», 5th IEEE Int. Conf. on Design and Technology of Integrated Systems in Nanoscale Era (DTIS’10), Hammamet Tunisia, 2010. 15A. Ben Hmida, S. Dhahri and A. Zitouni, «A high performance architecture design of CAVLC coding suitable for real-time applications», IEEE Int. Conf. on Computer Science and Applications (ICCSA’13), Hammamet, Tunisia, 2013. 16M. Elhaji, B. Attia, A. Zitouni, S. Meftaly, J.L. Dekeyser and R. Tourki, «FeRONoC: Flexible and extensible router implementation for diagonal mesh topology», IEEE Int. Conf. on Design and Architectures for Signal and Image Processing (DASIP'11), Finland, 2011. 17B. Attia, W. Chouchene, A. Zitouni and R. Tourki, «Network interface sharing for SoC based NoC», 11th IEEE Int. Conf. on Communications, Computing and Control Applications (CCCA’11), Hammamet, Tunisia, 2011. 18B. Attia, W. Chouchene, A. Zitouni, N. Abid and R. Tourki. «A modular router architecture design for network on chip». 8th IEEE Int. Multi-Conf. on Systems, Signals & Devices (SSD’11), Sousse, Tunisia, 2011. 19W. Chouchene, B. Attia, A. Zitouni, N. Abid and R. Tourki, «A low power network interface for network on chip», 8th IEEE Int. Multi-Conf. on Systems, Signals & Devices (SSD’11), Sousse, Tunisia, 2011. 20W. Chouchene, B. Attia, A. Zitouni, N. Abid and R. Tourki, «A low latency router architecture for QoS network on chip», 6th IEEE Int. Conf. on Sciences of Electronic, Technologies of Information and Telecommunications (SETIT'11), Hammamet, Tunisia, 2011. 21B. Attia, W. Chouchene, A. Zitouni, N. Abid and R. Tourki, «Design and implementation of low latency network interface for network on chip». 5th IEEE Int. Conf. on Design and Test Workshop (IDT’10), pp. 37-42, Abu Dahbi, UAE, 2010. 22
H. Chaouch, S. Dhahri, A. Zitouni and R. Tourki, «Low power architecture of motion estimation and efficient intra prediction based on Hardware design for H.264», IEEE Int. Conf. on Design & Technology of Integrated Systems in Nanoscale Era (DTIS'10), Hammamet, Tunisia, 2010. 23L. Kabbai, S. Dhahri, A. Zitouni and R. Tourki, «A low power oriented gradient search motion estimator for the H264AVC coder», 6th Int. Conf. on Electrical Systems and Automatic Control (JTEA'10), Hammamet, Tunisia, 2010. 24N. Jarray, S. Dhahri, M. Elhaji and A. Zitouni, «A high level hardware architecture binarizer for H.264/AVC CABAC encoder», IEEE Int. Conf. on Control, Engineering & Information Technology (CEIT’13), Sousse, Tunisia, 2013. 25W. Chouchene, B. Attia, N. Abid, A. Zitouni and R. Tourki, «A quality of service network on chip based on a new priority arbitration mechanism», 23th IEEE Int. Conf. on Microelectronics (ICM'11), Hammamet, Tunisia, 2011. 26N. Abid, W. Chouchene, B. Attia, A. Zitouni and R. Tourki, «Design and performance evaluation of on chip network with transaction level modeling», 23th IEEE Int. Conf. On Microelectronics (ICM'11), Hammamet, Tunisia, 2011. 27B. Attia, W. Chouchene, N. Abid, A. Zitouni, K. Torki and R. Tourki, «A new pipelined network interface for network on chip with latency and jitter optimization», (Best paper Award) 23th IEEE Int. Conf. on Microelectronics (ICM 2011), Hammamet Tunisia, 2011. 28M. Elhaji, P. Boulet, S. Meftali, A. Zitouni, J.L. Dekeyser and R. Tourki, «An MDE approach for modeling network on chip topologies», 5th IEEE Int. Conf. on Design & Technology of Integrated Systems in Nanoscale Era (DTIS'10), Hammamet, Tunisia, 2010. 29A. Zitouni, M. Abid, Rached Tourki, «Interfacing incompatible protocols in SoC by using RTR of FPGAs», Second International Conference on Signals, Systems, Decision (SSD03), Sousse, Tunisie, IEEE, pp. 129-134, Mars 2003. 30S. Badrouchi, A. Zitouni, Mohamed Abid, Rached Tourki, «Etude de l’implantation d’un adaptateur multi bus en vue d’intégration sur un SoC», 3ème Journées Scientifiques des Jeunes Chercheurs (GEI03), pp. 181-184, Mehdia, Mars 2003. 31K. Mejdi, A. Zitouni, R. Tourki, «Synthèse des contrôleurs de communication en vue de résoudre des conflits dans les SoC», 8éme Colloque National de Recherche en Physique, Sousse, Décembre 2005. 32A. Zitouni, K. Mejdi, R. Tourki, «Conception d’un routeur asynchrone pour NoC» 8éme Colloque National de Recherche en Physique, Sousse, Décembre 2005. 33O. Bouraoui, A. Zitouni, A. Mtibaâ, M. Abid, «Communication between SDF blocks for SoC interface synthesis», Second International Conference on Signals, Systems, Decision (SSD03), Sousse, Tunisie, IEEE, pp. 84-88, Mars 2003. 34O. Bouraoui, A. Zitouni, A. Mtibaâ, M. Abid, «Verification techniques for deadlock and real time constraint violation», First Annual Northeast Workshop on Circuits and Systems, NEWCAS’03, pp. 49-52, Montreal, Canada, Juin 2003. 35M. Zid, A. Zitouni, A. Baganne, R. Tourki, «New generic GALS NoC architectures with multiple QoS», IEEE Int. Conf. on Design & Test of Integrated Systems in Nanoscale Technology (DTIS06), Tunis, Tunisie, September 2006. 36S. Dhahri, A. Zitouni, M. Elhaji, R. Tourki, «Adaptive motion estimator for the H264 coder», IEEE Int. Conf. on Design & Test of Int. Systems in Nanoscale Technology (DTIS08), Tozeur, Tunisie, Mars 2008. 37
S. Dhahri, M. Hajji, A. Zitouni, R. Tourki, «Conception d’un estimateur de mouvement configurable pour le codec H264», JTEA08, pp. 806-812, Hammamet, Tunisie, Mai 2008.38M. Hajji, S. Dhahri, A. Zitouni, R. Tourki, «Conception d’un estimateur de mouvement GALS pour le Codec H264», JTEA08, pp. 801-805, Hammamet, Tunisie, Mai 2008. 39M. Hajji, A. Zitouni, R. Tourki, «A low power ASIC design of a FSBM motion estimator for H.264AVC», 5th Int. Conf. on Sciences of Electronic, Tech. of Inf. And Telecomm. (SETIT09), Hammamet, Tunisie, Mars 2009. 40Dhahri, A. Zitouni, Haithem Chaouech, R. Tourki, «Adaptive motion estimator based on variable block size scheme», Proc. of World Academy of Science, Engineering and Technology, Vol. 38, pp. 394-394, February 2009. 41A. Zitouni, M. Abid, A. Mtibaa, R. Tourki, "Conception des interfaces à partir des spécifications comportementales", Proc. of the Conf. on Modeling and Simulation of Electrical Systems (CMSES’97), Saida, Algeria, pp. 86-92, May 1997. 42A. Zitouni, M. Abid, R. Tourki, "Round-robin arbiter generation and synthesis algorithms for system communication synthesis", Proc. of the 4th IEEE Int. Conf. on Electronics Circuits, and Systems (ICECS'97), Cairo, Egypt, pp. 888-894, December 1997. 43A. Zitouni, M. Abid, R. Tourki, "Interface synthesis techniques for system communication design", Proc. of the 2nd IEEE Int. Conf. on Comp. Eng. In Sys. App. (CESA’98), Tunisia, pp. 460-465, April 1998. 44A. Zitouni, M. Abid, K. Torki, C. Souani, R. Tourki, "Communication synthesis approach for distributed systems and its application during the design of a communication controller", Proc. of the 10th IEEE Int. Conf. on Microelectronics, (ICM’98), Monastir, Tunisia, pp. 249-252, December 1998. 45A. Zitouni, M. Abid, R. Tourki, "An arbiter synthesis approach based on arbitration scheme generation/selection for HW/SW co-design", Proc. of the 5th IEEE Int. Conf. on Electronics Circuits and Systems, (ICECS'98), Lisboa, Portugal, pp. 521-526, 1998. 46A. Zitouni, M. Abid, R. Tourki, "Arbitration synthesis approach for multiprocessor systems", Proc. of the IEEE Int. Wshop. On Signal Processing Systems (SIPS’98), Cambridge, MA, USA 1998. 47A. Zitouni, M. Merzougui, M. Abid, R. Tourki "A toolbox-based communication synthesis environment", Proc. Smart Systems and Devices (SSD), pp. 318-322, Hammamet-Tunisie, Mars 2001. 48A. Zitouni, M. Abid, R. Tourki, "Modélisation et synthèse d'un arbitre en vue d'une implantation sur un FPGA", (JTEA'97), Nabeul, Tunisie, pp. 128-137, November 1997. 49A. Zitouni, M. Abid, S. Gnanna, R. Tourki, "Génération automatique des unités de communication pour les systèmes temps réel", 5th Colloque d’Informatique Industrielle (CII98), Djerba, pp. 65-71, February 1998. 50M. Marzougui, A. Zitouni, M. Abid, R. Tourki, "Processor model for co-simulation of heterogeneous software/hardware systems", Fuzzy Logic ANNIE, ST Louis, Missouri, USA; ISBN 0-7918-0161-6, Vol. 10, pp. 977-982, November 2000. 51A. Ben-Rabaa, A. Zitouni, M. Abid, R. Tourki, "Implementation of an acoustic echo canceller based on NLMS-recurrent neural networks structures," Proc. of the 2nd IEEE Int. Conf. on Comp. Eng. In Systems App. (CESA’98), Tunisia, pp. 525-528, April 1998. 52A. Ben-Rabaa, A. Zitouni, M. Abid, R. Tourki, "Hardware implementation of an acoustic echo canceller based on NLMS-recurrent neural networks structures," 4th Journées Adéquation Algorithme Architecture, CEA/LET, France, pp. 83-89, January 1998. 53
A. Ben-Rabaa, A. Zitouni, M. Abid, R. Tourki, "Implementation of an acoustic echo canceller based on NLMS-neural networks structures by using the VHDL", Proc. of the IEEE Int. Conf. on Communications (ICC’98), Atlanta, GA, USA, pp. 1789-1793, June 1998. 54C. Souani, M. Abib, A. Zitouni, M. Atri, R. Tourki, "A heterogeneous multiprocessor system with dedicated communication controller", Proc. of the 4th IEEE Int. Conf. on Electronics Circuits, and Systems (ICECS'97), Cairo, Egypte, pp. 310-314, December 1997. 55S. Dhahri, Y. Salah, A. Zitouni, “Adaptive Motion Estimator for real time applications H.264 video encoding”, International Conference on Multifunctional Materials and their Applications (2MAP-2016), May 6-8, 2016, Sousse, TUNISIA. 56B. Attia, N. Abid, W. Chouchen, A. Zitouni, & R. Tourki, “VCRBCM: A low latency virtual channel router architecture based on blocking controller manger”, 2013, 10th International Multi-Conference on Systems, Signals and Devices, SSD 2013.57N. Abid, B. Attia, A. Zitouni, & R. Tourki, “A modular and generic router TLM model for speedup network-on-chip topology generation”, 2013, 10th International Multi-onference on Systems, Signals and Devices, SSD 2013.58
